English | PDF | 2011 | 198 Pages | ISBN : 1441981039 | 4 MB

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.

Describes in detail the synthesis of logic functions using memories;

Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis;

Shows logic design methods for index generation functions;

Introduces C-measure, which specifies the complexity of Boolean functions;

Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, teal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.